General
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Processor
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ARM926EJ-S
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Speed Grades
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75/150 MHz
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Cache
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4 KB I-cache / 4 KB D-cache
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Process
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0.18µ CMOS
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32-bit ARMv5TEJ Instruction Set
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16-bit Thumb Instruction Set
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MMU
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DSP Instruction Extensions
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(Improved divide, Single cycle multiply accumulate)
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ARM Jazelle® Java Accelerator
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Embedded ICE-RT Debug Unit
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JTAG Boundary Scan, BSDL
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Power Management Modes
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AES Accelerator
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Key Length
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128-, 192-, 256-bit
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Cipher Modes
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ECB, CBC, OFB, CTR, CCM
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Hardware Key Expander
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DMA-Enabled
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NIST-Compliant
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FIM (Flexible Interface Module)
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FIMs
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1/2; Availability depending on application-specific use of
external 16-/32-bit memory bus
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2
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Cores
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8-bit DRPIC1655X
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Speed
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Up to 300 MHz (4x bus speed)
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Data Memory (SRAM)
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192 Bytes
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Program Memory (SRAM)
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2 KB
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Interface Options
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SD/SDIO, UART, 1-Wire, CAN, USB device (low-speed), Other; Please contact us for custom interface implementation options
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Power Management
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Dynamic Clock Scaling (patent pending)
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Full, /2, /4, /8, /16 speeds, with hardware clock scale control (wake-up events)
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Low-Power Sleep Modes
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Configurable Wake-Up Conditions
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External IRQ, I2
C, SPI, UART, Ethernet
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External IRQ, I2
C, SPI, UART, Ethernet, RTC
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Disabling of Unused System Modules
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Memory Controller
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Glue-less Interface
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(SDRAM, SRAM, Buffered DIMM, EEPROM, Flash)
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Self-Refresh (Sleep Mode)
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Dynamic/Static Memory Chip Selects
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Selection of 5
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4/4
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Wait States Per Memory Chip Select
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0-32
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Static Memory Controller Extended Waits (EW)
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Up to 16,368
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Automatic Dynamic Bus Sizing
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Burst Support
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8-transfer, with automatic data width adjustment
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External DMA Channels
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2
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System Bus DMA
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High-Speed Rotating AHB arbiter
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16 channels
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Deterministic Bus Bandwidth Allocation
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Multiple Bus Masters
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Ethernet Tx/Rx, I/O Hub, Ext DMA, ARM core
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External DMA
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Independent DMA Channels
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2
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Transfer Modes
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External peripherals, External memory, AHB peripherals
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AES DMA Support
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AHB Master
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I/O Hub
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Low Latency
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DMA
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8 channels
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DMA or Direct Access Mode
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UART, SPI, FIM
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UART, SPI, ADC, FIM
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Direct Access Mode Only
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I2C
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I2C, RTC
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AHB Master
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External Interrupts
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External Programmable Interrupts
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4
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Advanced Vectored Interrupt Controller
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Two-Tier Priority
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(FIRQ/IRQ)
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Low-Latency FIRQ
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Interrupt Sources
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32
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Ethernet MAC
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Data Rates
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10 / 100 Mbit/s
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Duplex
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Full and Half
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PHY Interface
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MII
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Address Filtering
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Station, Broadcast, Multicast
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FIFO
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2 KB Rx / 256 Byes Tx
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Separate Tx and Rx DMA Channels
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Programmable 8-Entry Restrictive Multicast
Filtering
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Access Modes
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Interrupt and DMA
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AHB Master
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UART
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Ports
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2 / 4; Availability depending on application-specific use of
external 16-/32-bit memory bus
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4
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Bit Rates
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Up to 1.8432 Mbps
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Data Format
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5 to 8 data bits; Odd, Even, or No parity; 1 or 2 stop bits; MSB or LSB first
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Channel Modes
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Normal, Local loopback, Remote loopback
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Modem Control Signals
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RTS, CTS, DTR, DSR, DCD, RI
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Maskable Interrupt Conditions
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Receiver idle; Transmitter idle; Receive error conditions; Character gap timeout; Character match events;
State change detection: CTS, DSR, DCD, RI
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FIFO
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2 KB Rx / 256 Byes Tx
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Transmit FIFO Bypass
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I2C v1.0
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Master/Slave
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Bit Rates
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100 kbit/s and 400 kbit/s modes
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Address Modes
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7-bit, 10-bit
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Bus Arbitration
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SPI (with Boot)
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Master/Slave
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Bit Rates
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33 Mps (Master) / 7.5 Mpbs (Slave) max
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SPI Modes
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0, 1, 2, 3
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Maskable Interrupt Conditions
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Boot Support
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Serial EEPROM, High-speed ROM/flash
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Patent Pending Serial Boot Circuit
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Automatic configuration, Internal register setup, Boot code transfer to external memory
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POR
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3.3V Voltage Monitoring
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Early Power-Loss Comparator with Alert for
Main Power Shutdown
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Auxiliary Analog Comparator
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2.4V trip point
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ADC
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Resolution/Conversion
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12 bit/1 MHz
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Multiplexed Inputs
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Single-ended 8:1
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Rail-to-Rail Input Range
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12-Bit Output
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DMA/Direct
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External Reference
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Timers/Counters/PWM
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General Purpose Timers/Counters
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10 (32-bit)
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PWM
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Up to 4 with basic or enhanced functionality
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Quadrature Decoder
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Software Watchdog Timer
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IRQ, FIQ, RESET
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GPIO
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Multiplexed GPIOs
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Up to 54
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Up to 108
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Real-Time Clock
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Alarm Masks and Event Detection
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Calendar
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1900-2999
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Resolution
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10 ms
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Integrated NVRAM
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64 Bytes
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External Battery Backup
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External Clock Source
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Operating Voltage
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Core
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1.8V
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I/O Ring
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3.3V
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5V-Tolerant GPIO and Memory Inputs
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Operating Temperature
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75/150 MHz
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-40° C to +85° C
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Power Dissipation
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150 MHz Core/75 MHz Bus
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1.019 W
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75 MHz Core/75 MHz Bus
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0.828 W
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112 MHz Core/56 MHz Bus
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0.638 W
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56 MHz Core/56 MHz Bus
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0.499 W
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Sleep Mode, Wake on Ethernet
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0.073 W
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Sleep Mode, Wake on Ext IRQ
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0.055 W
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Main Power Down, Battery Draw
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3.0V 32 µA; 1.8V 6 µA
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Package
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Type
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177-pin BGA (Pin-compatible with NS7520)
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265-pin BGA
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Ball Pitch
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0.8 mm
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Size
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13 x 13 mm
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15 x 15 mm
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Lead-Free, RoHS Compliant
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